[Advcomparch] Benchmarks

[Thomas Pazios]

Ta benchmarks ti diafores exoun metaksy tous?

Etreksa to bzip2 kai to mcf kai mou evgalan poly paromoia apotelesmata, enw h
IC exei ola ta statistika ths mhdenika kai sta 2 benchmarks


Parathetw ta apotelesmata tou bzip2 gia mnhmh 32K kai associativity 4 kai line
size 64




Statistics for cpu cpu0
       User  Supervisor       Total  Description
    4520860 14217049586 14221570446  instructions executed
    1767088    52822054    54589142  memory read operations
    1064679    31071111    32135790  memory write operations
          0     4804035     4804035  I/O read operations
          0        8882        8882  I/O write operations
processor        steps       cycles  time [s]
cpu0       14221570446  14510913369   725.546
Simulating...
Collect statistics

Cache statistics: dc
-----------------
    Total number of transactions:     432233153

         Device data reads (DMA):             0
        Device data writes (DMA):             0

          Uncacheable data reads:           933
         Uncacheable data writes:           816
 Uncacheable instruction fetches:             0

          Data read transactions:     272106116
                Data read misses:         73274
             Data read hit ratio:         99.97%

  Instruction fetch transactions:             0
        Instruction fetch misses:             0

         Data write transactions:     160125288
               Data write misses:         20529
            Data write hit ratio:         99.99%

          Copy back transactions:             0

               Lost Stall Cycles:       5858731

Cache statistics: ic
-----------------
    Total number of transactions:             0

         Device data reads (DMA):             0
        Device data writes (DMA):             0

          Uncacheable data reads:             0
         Uncacheable data writes:             0
 Uncacheable instruction fetches:             0

          Data read transactions:             0
                Data read misses:             0

  Instruction fetch transactions:             0
        Instruction fetch misses:             0

         Data write transactions:             0
               Data write misses:             0

          Copy back transactions:             0


Cache statistics: l2c
-----------------
    Total number of transactions:     160200311

         Device data reads (DMA):             0
        Device data writes (DMA):             0

          Uncacheable data reads:           933
         Uncacheable data writes:           816
 Uncacheable instruction fetches:             0

          Data read transactions:         73274
                Data read misses:           651
             Data read hit ratio:         99.11%

  Instruction fetch transactions:             0
        Instruction fetch misses:             0

         Data write transactions:     160125288
               Data write misses:           257
            Data write hit ratio:        100.00%

          Copy back transactions:             0

               Lost Stall Cycles:       2928830

Statistics for cpu cpu0
       User  Supervisor       Total  Description
    4605845 15216964601 15221570446  instructions executed
    1790403   324922247   326712650  memory read operations
    1077432   191183646   192261078  memory write operations
          0    29064671    29064671  I/O read operations
          0       58686       58686  I/O write operations
processor        steps       cycles  time [s]
cpu0       15221570446  18401337040   920.067
[cpu0] cs:0xc01fa3ef p:0x001fa3ef  pop ebx





ta apotelesmata tou mcf einai paraplhsia se megalo vathmo.